< Advanced electronic packaging technology and market seminar l >

1. Date and time: Thursday, October 25, 2023, 10:10 to 17:00

2. Location: COEX Room 308

3. Schedule:

10:00 – 10:45 / Trends in semiconductor package technology responding to ESG (Environment, Social, Governance) / Seo Min-seok TL, SK Hynix

10:50 – 11:40 / Lateral Communication (Bridges) between Chiplet Heterogeneous Integration / John H Lau, Unimicron

11:45 – 12:30 / Changes in the semiconductor industry and cutting-edge packaging technology trends / Managing Director Kang In-soo, Nepes

13:45 – 14:30 / Development of core materials/process technology for next-generation power semiconductor PKG/module - Focusing on power semiconductor bonding technology - / Senior Cheol-min Oh, KETI

14:35 – 15:20 / Novel low Dk/Df dryfilm for high frequency substrate/RDL for chiplet integration and related materials / Takenori Kakutani, BD Specialist, TAIYO INK

15:25 – 16:10 / Direction of semiconductor substrate technology development / Master Moonsang Yoo, Simmtech

16:15 – 17:00 / Electroplating technology for vertical pulse TH/Via peeling, a next-generation electrocopper plating technology for IC-substrate / Seokbong Oh, Director, ATOTECH