1. 일 시 : 2021년 1월 25일(월)
2. 장 소 : 비대면 회의

– PLP Status (Dr. Tanja Braun)
What in Large Area Panel Level Packaging ?
Panel Level Packaging
 Embedding technology
 Merging of technologies, materials and equipment from Wafer, PCB, LCD,.. technologies
 Not really a question fo size
Fan-Out Panel Level Packaging
 Mold embedding approach
 Processing on large area formats
 Driven by cost reduction and potential for large □ SiPs

– FRAUNHOFER INSTITUTE FOR RELIABILITY AND MICROINTEGRATION IZM
 ORGANIZATIONAL STRUCTURE
 Merging of Wafer-and Panel-Level Technlogies
 Packaging Lines
 R&D Highlights

– Substrate Embedding (Dr. Andreas Ostmann)
 Substrate Embedding
 Process
 Test Vehicle
 Application Project Serena
 Strategic Research 6G SENTINEL
 Summary

– Latest development status of EOMINTM wiring board with embedded componet (Dr. Yoshihisa Katoh)
 Introduction of EOMINTM
 Via bonding technology for embedded component
 Contribition for increasing module performance
 Densifying EOMINTM
 Development status for low-warpage EOMINTM with embedded active
component

– Embedded Structure for PCB Thermal Solution in High-Speed Optical Module (Dr. Ray Tain)
 PCB Applications for 5G
 Optical Module Survey
 Unimicron’s Embedded Heat Slug Technology
 CONCLUSIONS

– Test method of electrical connectivity based on known-good-module
(KGM) for the stacked electronic module (Dr. Satoshi Kojima)
 New technology driver – AI edge devices
 Stacked electronic module
 IEC 62878-2-600 series – guideline for stacked electronic module
 Future IEC 62878-2-603
KGM based approach
I2G bidirectional bus
Test method
 Survey on IEC 63011-5

– Development of Device Embedded Module with Cavity Structure
(Dr. Hyunho Kim)
 Korea Packaging Integration Association
 Packaging Interation Trend
 Device embedded Module